SATH: Simulated Annealing C code To FPGA Hardware compiler: Customizing Pipelined Simulated Annealing IP cores with a dedicated C to FPGA compiler

Name: SATH: Simulated Annealing C code To FPGA Hardware compiler: Customizing Pipelined Simulated Annealing IP cores with a dedicated C to FPGA compiler
Price: 80480 CLP
Availability: InStock
Author: Jonathan Phillips