Name: cmos fractional-n synthesizers: design for high spectral purity and monolithic integration (en Inglés)
Price: 354990.00 CLP
Availability: InStock
Author: de Muer, Bram ; Steyaert, Michiel
ISBN: 9781441953438

$portada cmos fractional-n synthesizers: design for high spectral purity and monolithic integration (en Inglés)$

Formato

Libro Físico

Autor

Michiel Steyaert

Bram de Muer

Editorial

Springer

Año

2010

Idioma

Inglés

N° páginas

256

Encuadernación

Tapa Blanda

Dimensiones

23.4 x 15.6 x 1.5 cm

Peso

0.39 kg.

ISBN

1441953434

ISBN13

9781441953438

Categorías

Matemáticas aplicadas
Ingeniería eléctrica
Electrónica: circuitos y componentes

cmos fractional-n synthesizers: design for high spectral purity and monolithic integration (en Inglés)

Michiel Steyaert (Autor) · Bram de Muer (Autor) · Springer · Tapa Blanda

Libro Nuevo

$ 354.990

$ 493.040

Ahorras: $ 138.050

28% descuento

Envío normal

Origen: Estados Unidos (Costos de importación incluídos en el precio)

Se enviará desde nuestra bodega entre el Miércoles 26 de Junio y el Lunes 08 de Julio.

Lo recibirás en cualquier lugar de Chile entre 1 y 3 días hábiles luego del envío.

Reseña del libro "cmos fractional-n synthesizers: design for high spectral purity and monolithic integration (en Inglés)"

CMOS Fractional-N Synthesizers fits in the quest for small and cheap cellular transceiver solutions. The book is conceived as a manual for the design of fully integrated DeltaSigma fractional-N frequency synthesizers in CMOS with a focus on achieving a high spectral purity, i.e. low-phase-noise and high spurious suppression. Fractional-N design is elaborated from specification derivation up to architectural and building block level and down to circuit level. CMOS Fractional-N Synthesizers starts with a comprehensive introduction to general frequency synthesis. Different architectures and synthesizer building blocks are discussed with their relative importance on synthesizer specifications. The process of synthesizer specification derivation is illustrated with the DCS-1800 standard as a general test case. The book tackles the design of fractional-N synthesizers in CMOS on circuit level as well as system level. The circuit level focuses on high-speed prescaler design up to 12 GHz in CMOS and on fully integrated, low-phase-noise LC-VCO design. High-Q inductor integration and simulation in CMOS is elaborated and flicker noise minimization techniques are presented, ranging from bias point choice to noise filtering techniques. On a higher level, a systematic design strategy has been developed that trades off all noise contributions and fast dynamics for integrated capacitance (area). Moreover, a theoretical DeltaSigma phase noise analysis is presented, extended with a fast non-linear analysis method to accurately predict the influence of PLL non-linearities on the spectral purity of the DeltaSigma fractional-N frequency synthesizers. CMOS Fractional-N Synthesizers covers the total design flow of monolithic CMOS fractional-N synthesizers with high spectral purity while providing insight in the most critical issues of monolithic fractional-N synthesis. All material is experimentally verified with several CMOS implementations, with ultimately a monolithic CMOS &Dgr;&Sgr;-controlled fractional-N synthesizer, which was part of a CMOS DCS-1800 transceiver front-end. The book is essential reading for analog and RF design engineers and researchers in the field and it is also suitable as text book for an advanced course on the subject.