Name: integrated circuit defect-sensitivity: (en Inglés)
Price: 122070.00 CLP
Availability: InStock
Author: pineda de gyvez
ISBN: 9780792393061

portada integrated circuit defect-sensitivity: (en Inglés)

Formato

Libro Físico

Editorial

springer publishing map

Autor

pineda de gyvez

Idioma

Inglés

N° páginas

192

ISBN

0792393066

ISBN13

9780792393061

Categorías

Ingeniería eléctrica

integrated circuit defect-sensitivity: (en Inglés)

Pineda De Gyvez (Autor) · springer publishing map · Libro Físico

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Reseña del libro "integrated circuit defect-sensitivity: (en Inglés)"

spot defects are random phenomena present in every fabrication line. as technological processes mature towards submicron features, the effect of these defects on the functional and parametric behavior of the ic becomes crucial. integrated circuit defect-sensitivity: theory and computational models reviews the importance of a defect-sensitivity analysis in comtemporary vlsi design procedures. the modeling of defects in microelectronics technologies is revised from a set theoretical approach as well as from a practical point of view. this way of handling the material introduces the reader step-by-step to critical area analysis through the construction of formal mathematical models. the rigorous formalism developed in this book is necessary to study the construction of deterministic algorithms for layout defect exploration. without this basis, it would be impossible to scan layouts in the order of 106 objects, or more, in a reasonable time. the theoretical component of this book is complemented with a set of practical case studies for fault extraction, yield prediction, and ic defect-sensitivity evaluation. these case studies emphasize the fact that by using appropriate formulae combining statistical data with the computed defect-sensitivity, an estimate of the ics defect tolerance can be obtained at the end of the respective production line. the case studies range from highlighting their geometrical nature as a function of the defect size to more specific situations highlighting layout regions where faults may occur. in addition to the visualization of critical areas, numerical data in the form of tables, graphs and histograms are provided for quantification purposes. more that, ever smarter, defect-tolerant design strategies have to be devised to attain high yields. obviously, the work presented in the book is not definitive, and more research will always be useful to advance the field of cad for manufacturability. this is, of course, one of the interesting challenges imposed by the ever-changing nature of microelectronic technologies. cad developers and yield practitioners from academia and industry will find that this book lays the foundations for further pioneering work.