Name: Network -On-Chip (NOC) Design Using FPGA Technology (en Inglés)
Price: 56300.00 CLP
Availability: InStock
Author: Jain, Manish
ISBN: 9786138919360

portada Network -On-Chip (NOC) Design Using FPGA Technology (en Inglés)

Network -On-Chip (NOC) Design Using FPGA Technology (en Inglés)

Formato

Libro Físico

Autor

Manish Jain

Editorial

Scholars' Press

Idioma

Inglés

N° páginas

Encuadernación

Tapa Blanda

Dimensiones

22.9 x 15.2 x 0.5 cm

Peso

0.12 kg.

ISBN13

9786138919360

Categorías

Ingeniería electrónica

Network -On-Chip (NOC) Design Using FPGA Technology (en Inglés)

Manish Jain (Autor) · Scholars' Press · Tapa Blanda

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Reseña del libro "Network -On-Chip (NOC) Design Using FPGA Technology (en Inglés)"

NoC is new paradigm for System-on-chip (SoC) design. NoC based system accommodate multiple asynchronous clocking that many of today's complex SoC design use.The NoC solutions bring a Networking method on-chip communication and claim roughly a performance increases over conventional bus system. As a systematic approach, Network-on-Chip (NoC) called also Network-on-Silicon, proposes networks as a scalable, reusable and global communication architecture to overcome the pains of future System-on-Chip.The idea of NoC is derived from large-scale computer networks and distributed computing. However, the routing techniques for NoC have some unique design considerations besides low latency and high throughput. Due to tight constraints on memory and computing resources, the routing techniques for NoC should be reasonably simple. Several switch architectures have been developed for NoC employing XY output selection and wormhole routing.NoC is a layered approach for on-chip communication design proposed in literature to cope with issues of current SoC architectures. A scalable communication infrastructure that better supports the trend of SoC integration consists of an on-chip packet-swit.