Name: Testability Concepts for Digital ICS: The Macro Test Approach (en Inglés)
Price: 274440.00 CLP
Availability: InStock
Author: Beenker, F. P. M. ; Bennetts, R. G. ; Thijssen, A. P.
ISBN: 9781461360049

portada Testability Concepts for Digital ICS: The Macro Test Approach (en Inglés)

Formato

Libro Físico

Autor

Editorial

Idioma

Inglés

N° páginas

212

Encuadernación

Tapa Blanda

Dimensiones

23.4 x 15.6 x 1.2 cm

Peso

0.33 kg.

ISBN13

9781461360049

Categorías

Ingeniería eléctrica
Electrónica: circuitos y componentes

Testability Concepts for Digital ICS: The Macro Test Approach (en Inglés)

F. P. M. Beenker (Autor) · R. G. Bennetts (Autor) · A. P. Thijssen (Autor) · Springer · Tapa Blanda

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Reseña del libro "Testability Concepts for Digital ICS: The Macro Test Approach (en Inglés)"

Preface Testing Integrated Circuits for manufacturing defects includes four basic disciplines. First of all an understanding of the origin and behaviour of defects. Secondly, knowledge of IC design and IC design styles. Thirdly, knowledge of how to create a test program for an IC which is targeted on detecting these defects, and finally, understanding of the hardware, Automatic Test Equipment, to run the test on. All four items have to be treated, managed, and to a great extent integrated before the term 'IC quality' gets a certain meaning and a test a certain measurable value. The contents of this book reflects our activities on testability concepts for complex digital ICs as performed at Philips Research Laboratories in Eindhoven, The Netherlands. Based on the statements above, we have worked along a long- term plan, which was based on four pillars. 1. The definition of a test methodology suitable for 'future' IC design styles, 2. capable of handling improved defect models, 3. supported by software tools, and 4. providing an easy link to Automatic Test Equipment. The reasoning we have followed was continuously focused on IC qUality. Quality expressed in terms of the ability of delivering a customer a device with no residual manufacturing defects. Bad devices should not escape a test. The basis of IC quality is a thorough understanding of defects and defect models.